Digital Systems and Microprocessor Design
e) You are provided with the following partial dump of the memory connected to the educational processor. A program starts at address zero, but we do not know how large it is.
Decode the instructions from address 0 to 15 and write the corresponding program in assembler (if it is not possible to decode an instruction indicate “invalid opcode”).
Indicate where (memory address) the program stops (i.e. the processor stops performing any useful computation).
Explain line by line what the instructions do, and explain what the overall program does (hint: look at the register values).
Adr Data
———-
00 10 03
02 11 04
04 42 02
06 55 00
08 B1 10
0A 22 00
0C 35 01
0E B0 06
10 B0 10
12 D0 55
14 47 37
[20 marks]
f) We are interested in realising a processor with 8 registers instead of 4. Discuss the changes that would be required to the instruction encoding to realise such a processor. Explain what other changes the instruction encoding would lead to, and how this would affect on the functionality of the processor.
[10 marks]
g) Write an assembler program that performs a loop exactly 5 times. Write down the assembler code first. Then, indicate which values must be stored at which memory locations (i.e. the instruction encoding) to realise this program. Assume the program starts at memory location 0 (i.e. on reset).
[5 marks]
h) Consider the instruction “xor c,3Ah” (assume a=10,b=20,c=55,d=40). Assume we are shortly before the clock edge of the “execute” cycle.
By analyzing the VHDL code, explain what happens inside the educational processor to execute this instruction. Specifically, indicate the state of the following signals (or indicate if undefined):
instruction (in cpu.vhd)
rrd1 (port of cpuregbank in cpu.vhd)
rrd2 (port of cpuregbank in cpu.vhd)
rwr (port of cpuregbank in cpu.vhd)
d (port of cpuregbank in cpu.vhd)
reg1out (in cpu.vhd)
reg2out (in cpu.vhd)
source (in cpu.vhd)
regwren (in cpu.vhd)
ram_we (in cpu.vhd)
ram_address (in cpu.vhd)
ram_datawr (in cpu.vhd)
op (port of cpualu in cpu.vhd)
a (port of cpualu in cpu.vhd)
b (port of cpualu in cpu.vhd)
aluqout (in cpu.vhd)
wrdata (in cpu.vhd)

finally, summarize the overall processor behavior with this instruction.
[20 marks]
i) Assume that a VHDL component “mul” is available that takes two 8-bit numbers A and B as input (i.e. STD_LOGIC_VECTOR(7 downto 0)) and returns the product M=AxB on 8 bits (i.e. STD_LOGIC_VECTOR(7 downto 0) as well). The component is solely combinational and you can use it following the usual VHDL syntax.
We want to extend the CPU ALU to be able to perform a multiplication using this component. This requires: 1) to define a new opcode that corresponds to a “mul” instruction; 2) to modify the processor ALU to add this new functionality; 3) to write an example program to show how to use this new instruction.
Report on the opcode you choose for this new instruction, and explain your choice. Explain how that instruction operates: which are its operands and where the result goes.
Report the modifications that must be made to the processor (provide VHDL code and explanations) to include this new multiplication instruction.
Write a simple example program that uses this new instruction; provide the assembler code and the instruction encoding.
[20 marks]

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H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2015
a) List 5 possible advantages or disadvantages of using a custom processor designed in VHDL
(such as UoS educational processor) instead of a processor or microcontroller available on
the market (such as an Atmel AVR) (5 items)
[5 marks]
b) Find what is the content of register b after executing the following code. For this, explain line
by line the operation performed by the instruction and the resulting register values.
mov ra,55
xor rb,rb
add rb,ra
add rb,rb
asr rb
[5 marks]
c) You are provided with the following partial dump of the memory connected to the
educational processor. A program starts at address zero, but we do not know how large it is.
Decode the instructions below and write the corresponding program in assembler.
Explain what the program does (hint: it is a known mathematical operation).
Indicate and discuss what is the likely size of the program. Assume that memory locations
from which instructions are never read represent the end of the program.
Adr Data
———-
00 10 04
02 42 01
04 54 00
06 B1 10
08 22 00
0A C0 02
0C 34 01
0E B0 04
10 B0 10
12 63 00
14 3D 25
16 A0 03
[20 marks]
d) Consider the instruction “mov [ra], 4B” (assume ra=10h,rb=20h,rc=55h,rd=40h). Assume we
are shortly before the clock edge of the “execute” cycle (i.e. at the next rising edge the
instruction will be executed).
By analyzing the VHDL code, explain what happens inside the educational processor to
execute this instruction. Specifically, indicate the state of the following signals (or indicate if
undefined):
instruction (in cpu.vhd)
rrd1 (port of cpuregbank in cpu.vhd)
rrd2 (port of cpuregbank in cpu.vhd)
rwr (port of cpuregbank in cpu.vhd)
d (port of cpuregbank in cpu.vhd)
H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2015
reg1out (in cpu.vhd)
reg2out (in cpu.vhd)
source (in cpu.vhd)
regwren (in cpu.vhd)
ram_we (in cpu.vhd)
ram_address (in cpu.vhd)
ram_datawr (in cpu.vhd)
op (port of cpualu in cpu.vhd)
a (port of cpualu in cpu.vhd)
b (port of cpualu in cpu.vhd)
aluqout (in cpu.vhd)
wrdata (in cpu.vhd)
finally, summarize the overall processor behavior with this instruction.
[20 marks]
e) Create a new opcode to generate a random number inside the processor ALU. This
requires: 1) to select an unused ALU opcode; 2) to implement a random number generator
in VHDL using linear feedback shift registers; 3) to modify the processor ALU to add this
new functionality; 4) to write a test the program.
Report here the modifications and were made to the processor (provide VHDL code and
explanations), specifically the implementation of the random number generator and the
modifications to the processor ALU (and other modifications if required).
Report the test program: provide the assembler code and the encoded instructions. Indicate
the first 5 random numbers that you obtain.
[20 marks]
f) The final evaluation is to implement your own program. The only requirements are that it
makes use of a custom instruction (that you have implemented!), that it fits in the memory of
the processor, and that its behavior can be demonstrated in the lab.
A suggestion for a custom program is to create the following simple game: a random
number R is generated and the user must find it using the switches S on the board. He
receives some hints from the program for that. If the number represented by the switches is
equal to the random number (S=R), make all the LEDs blink ON and OFF (success!). If S<R
then turn on the four righmost LEDs (hint to the player). if S>R then turn on the four leftmost
LEDs (hint to the player). The game continues until the number is found. When it is found,
the game starts over.
[20 marks]
g) Explain and justify how much data memory the processor can access with the instruction
mov. Explain a realistic option to address more memory involving a hardware modification
using the “ext” port.
[5 marks]
h) Explain how the Educational Processor could be modified to execute an instruction in less
than 3 clock cycles.
[5 marks]

H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2015
a) List 5 possible advantages or disadvantages of using a custom processor designed in VHDL
(such as UoS educational processor) instead of a processor or microcontroller available on
the market (such as an Atmel AVR) (5 items)
[5 marks]
b) Find what is the content of register b after executing the following code. For this, explain line
by line the operation performed by the instruction and the resulting register values.
mov ra,55
xor rb,rb
add rb,ra
add rb,rb
asr rb
[5 marks]
c) You are provided with the following partial dump of the memory connected to the
educational processor. A program starts at address zero, but we do not know how large it is.
Decode the instructions below and write the corresponding program in assembler.
Explain what the program does (hint: it is a known mathematical operation).
Indicate and discuss what is the likely size of the program. Assume that memory locations
from which instructions are never read represent the end of the program.
Adr Data
———-
00 10 04
02 42 01
04 54 00
06 B1 10
08 22 00
0A C0 02
0C 34 01
0E B0 04
10 B0 10
12 63 00
14 3D 25
16 A0 03
[20 marks]
d) Consider the instruction “mov [ra], 4B” (assume ra=10h,rb=20h,rc=55h,rd=40h). Assume we
are shortly before the clock edge of the “execute” cycle (i.e. at the next rising edge the
instruction will be executed).
By analyzing the VHDL code, explain what happens inside the educational processor to
execute this instruction. Specifically, indicate the state of the following signals (or indicate if
undefined):
instruction (in cpu.vhd)
rrd1 (port of cpuregbank in cpu.vhd)
rrd2 (port of cpuregbank in cpu.vhd)
rwr (port of cpuregbank in cpu.vhd)
d (port of cpuregbank in cpu.vhd)
H7068 DIGITAL SYSTEMS AND MICROPROCESSOR DESIGN: COURSEWORK 2015
reg1out (in cpu.vhd)
reg2out (in cpu.vhd)
source (in cpu.vhd)
regwren (in cpu.vhd)
ram_we (in cpu.vhd)
ram_address (in cpu.vhd)
ram_datawr (in cpu.vhd)
op (port of cpualu in cpu.vhd)
a (port of cpualu in cpu.vhd)
b (port of cpualu in cpu.vhd)
aluqout (in cpu.vhd)
wrdata (in cpu.vhd)
finally, summarize the overall processor behavior with this instruction.
[20 marks]
e) Create a new opcode to generate a random number inside the processor ALU. This
requires: 1) to select an unused ALU opcode; 2) to implement a random number generator
in VHDL using linear feedback shift registers; 3) to modify the processor ALU to add this
new functionality; 4) to write a test the program.
Report here the modifications and were made to the processor (provide VHDL code and
explanations), specifically the implementation of the random number generator and the
modifications to the processor ALU (and other modifications if required).
Report the test program: provide the assembler code and the encoded instructions. Indicate
the first 5 random numbers that you obtain.
[20 marks]
f) The final evaluation is to implement your own program. The only requirements are that it
makes use of a custom instruction (that you have implemented!), that it fits in the memory of
the processor, and that its behavior can be demonstrated in the lab.
A suggestion for a custom program is to create the following simple game: a random
number R is generated and the user must find it using the switches S on the board. He
receives some hints from the program for that. If the number represented by the switches is
equal to the random number (S=R), make all the LEDs blink ON and OFF (success!). If S<R
then turn on the four righmost LEDs (hint to the player). if S>R then turn on the four leftmost
LEDs (hint to the player). The game continues until the number is found. When it is found,
the game starts over.
[20 marks]
g) Explain and justify how much data memory the processor can access with the instruction
mov. Explain a realistic option to address more memory involving a hardware modification
using the “ext” port.
[5 marks]
h) Explain how the Educational Processor could be modified to execute an instruction in less
than 3 clock cycles.
[5 marks]